pa675t pin connection 654 123 1. 2. 3. 4. 5. 6. source 1 gate 1 drain 2 source 2 gate 2 drain 1 (s1) (g1) (d2) (s2) (g2) (d1) description the pa675t is an n-channel vertical mos fet. because it can be driven by a voltage as low as 1.5 v and it is not necessary to consider a drive current, this fet is ideal as an actuator for low-current portable systems such as headphone stereos and video cameras. features ? two mos fet circuits in package the same size as sc-70 ? automatic mounting supported ? gate can be driven by a 1.5 v power source ? because of its high input impedance, there?s no need to consider a drive current ? since bias resistance can be omitted, the number of components required can be reduced ordering information part number package pa675t note sc-88 (ssp) note marking: sa absolute maximum ratings (t a = 25c) drain to source voltage (v gs = 0 v) v dss 16 v gate to source voltage (v ds = 0 v) v gss 7.0 v drain current (dc) (tc = 25c) i d(dc) 0.1 a drain current (pulse) note i d(pulse) 0.2 a total power dissipation (t c = 25c) p t 0.2 w channel temperature t ch 150 c storage temperature t stg ?55 to +150 c note pw 10 ms, duty cycle 50% package drawing (unit: mm) 0.2 +0.1 - 0 0.15 +0.1 - 0.05 2.1 0.1 1.25 0.1 0.65 1.3 0.7 2.0 0.2 0.9 0.1 0 to 0.1 0.65 6 1 5 2 4 3 product specification 1 of 2 4008-318-123 sales@twtysemi.com http://www.twtysemi.com
electrical characteristics (t a = 25c) characteristics symbol test conditions min. typ. max. unit zero gate voltage drain current i dss v ds = 16 v, v gs = 0 v 1.0 a gate leakage current i gss v gs = 7.0 v, v ds = 0 v 3.0 a gate cut-off voltage v gs(off) v ds = 3 v, i d = 10 a 0.5 0.8 1.1 v forward transfer admittance | y fs |v ds = 3 v, i d = 10 ma 20 ms drain to source on-state resistance r ds(on)1 v gs = 1.5 v, i d = 1 ma 20 50 ? r ds(on)2 v gs = 2.5 v, i d = 10 ma 7 15 ? r ds(on)3 v gs = 4.0 v, i d = 10 ma 5 12 ? input capacitance c iss v ds = 3 v 10 pf output capacitance c oss v gs = 0 v 13 pf reverse transfer capacitance c rss f = 1 mhz 3 pf turn-on delay time t d(on) v dd = 3 v, i d = 10 ma 15 ns rise time t r v gs = 3 v 70 ns turn-off delay time t d(off) r g = 10 ? 100 ns fall time t f 110 ns switching time measurement circuit and conditions pg. r g 0 v gs dut r l v dd = 1 s duty cycle 1% gate voltage wave- form drain current wave- form v gs 10% 90% v gs 10% 0 i d 90% 90% t d(on) t r t d(off) t f 10% i d 0 t on t off pa675t product specification 2 of 2 4008-318-123 sales@twtysemi.com http://www.twtysemi.com
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